FPGA 2007 Pre-Conference Workshop on Grand Challenges in FPGA Research

This special pre-conference workshop aims to bring together top researchers from industry and academia to identify some of the most challenging research problems that are facing FPGAs.

This workshop will be particularly useful for up-and-coming young researchers who are beginning their career. Where is the low-hanging fruit, and what problems are worth addressing as academics or as industrial researchers? What types of problems are likely to win funding support? Learn from the advice of our specially invited presenters and from challenges and contributions from the audience!

Session W1: High-level CAD and Architecture

• Jason Cong, UCLA
• Kurt Keutzer, UCB
• Grant Martin, Tensilica
  Session W2: Low-level CAD and Architecture
  
• Vaughn Betz, Altera
• Steve Trimberger, Xilinx
• Jonathan Rose, Toronto
• André DeHon, U.Penn

• is FPGA synthesis, place and route mature?
• are current algorithms and tools close to optimal? is there evidence?
• where is there room and need for innovation?
• are the big challenges moving to higher levels (system/high-level synthesis) or lower levels (DFM/DFY/DSM issues, reliability, variation?)
• is dynamic/runtime management of FPGA resources needed?
• where can young researchers expect to make a big impact?
• what challenges/problems, if solved, will bring you community accolades? (and what problems are so well trod they should be approached with care?)
• which is more mature / needs more research: architecture? CAD? both?
• what promises or challenges does nanotechnology deliver to FPGAs?